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Full-chip power-supply noise: the effect of on-chip power-rail inductance

Publication Type:

Conference Paper

Source:

Int. J. High Speed Electron. Syst. (Singapore), Volume 12, Number 2, St. Croix, VI, USA, p.573 - 82 (2002)

URL:

http://dx.doi.org/10.1142/S0129156402001472

Keywords:

circuit simulation;CMOS digital integrated circuits;equivalent circuits;inductance;integrated circuit noise;switching;transients;

Abstract:

The importance of on-chip power-rail inductance in generating delta-I power-supply noise is examined in this paper using systematic circuit simulation of the complete integrated-circuit power net. This source of noise is compared to the resistive IR drop in the net, and to the delta-I noise due to both high-inductance- and low- inductance-bonding packages. Results are presented for a typical on-chip power net in 0.18 μm CMOS technology, and it is demonstrated that the inductance of this on-chip power net is the dominant contributor to the full-chip power-supply noise. The simultaneous switching events which produce the triggering current transients for the delta-I noise are taken to arise from core-logic switching; the mitigating, de-coupling role of the capacitance of non-switching gates within the core-logic block is considered

Notes:

full-chip power-supply noise;on-chip power-rail inductance;delta-I power-supply noise;circuit simulation;integrated circuit power net;IC power net;high-inductance-bonding packages;low-inductance-bonding packages;CMOS technology;simultaneous switching events;triggering current transients;core-logic switching;de-coupling role;nonswitching gate capacitance;0.18 micron;