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Effect of traffic localization on energy dissipation in NoC-based interconnect

Publication Type:

Conference Paper

Source:

IEEE International Symposium on Circuits and Systems (ISCAS) (IEEE Cat. No. 05CH37618), IEEE, Volume Vol. 2, Kobe, Japan, p.1774-7 (2005)

Keywords:

IP networks; multiprocessor interconnection networks; system-on-chip; telecommunication network routing; telecommunication network topology

Abstract:

Multiprocessor system-on-chip (MP-SoC) platforms are emerging as an important trend of SoC design. Scaleable communication-centric interconnect fabrics such as networks-on-chip (NoCs) possess many features that render them particularly attractive for enabling such platforms. In particular, due to their modular structure, NoCs can exploit locality in communication and reduce the need for long global wires, thereby significantly lowering the energy dissipation without compromising system throughput. In this paper, we study the effect of traffic localization on the energy dissipation of different NoC interconnect architectures. To quantify the degree of energy savings, we introduce the energy dissipation versus throughput as a useful metric. Through system level simulation, we show that energy reductions of up to 50\% can be achieved by exploiting locality in communication