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Count-based BIST compaction schemes and aliasing probability computation

Publication Type:

Journal Article

Source:

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. (USA), Volume 11, p.768-77 (1992)

URL:

http://dx.doi.org/10.1109/43.137522

Keywords:

built-in self test; Markov processes; probability

Abstract:

The authors present a unified probabilistic model of count-based compaction that relates the probability of occurrence of the counted events to a circuit's fault detection probabilities. This model allows an identical treatment of all the different count-based techniques proposed to date, e.g. ones, transitions, edges, and spectral coefficients, by essentially reducing all techniques to simple ones-counting. From a Markov model of ones-counting, the authors derive asymptotic aliasing probabilities, and for finite test sequence lengths they developed a computation technique for determining the aliasing associated with the specifically mentioned schemes, as well as more general count-based compaction techniques, under various error models