%0 Conference Paper %B Proceedings. 24th IEEE VLSI Test Symposium %D 2006 %T BIST for network-on-chip interconnect infrastructures %A Grecu, C %A Pande, P %A Ivanov, A %A Saleh, R %C Berkeley, CA, USA %I IEEE Computer Society %K built-in self test,coupled circuits,crosstalk,network-on-chip,switched networks %P 6 pp. %X In this paper, we present a novel built-in self-test methodology for testing the inter-switch links of network-on-chip (NoC) based chips. This methodology uses a high-level fault model that accounts for crosstalk effects due to inter-wire coupling. The novelty of our approach lies in the progressive reuse of the NoC infrastructure to transport test data to its own components under test in a bootstrap manner, and in extensively exploiting the inherent parallelism of the data transport mechanism to reduce the test time and implicitly the test cost %9 inproceedings