@article { 3705301, title = {An investigation of pnp polysilicon emitter transistors}, journal = {Solid-State Electron. (UK)}, volume = {33}, number = {7}, year = {1990}, note = {emitter tunnel oxide layer;emitter thin insulating layer;DC characteristics;semiconductors;pnp polysilicon emitter transistors;PETs;annealing;insulator thickness;p-type monosilicon emitter region;current gains;polycrystalline Si emitter;Si-SiOx-Si;}, pages = {813 - 18}, type = {article}, abstract = {The DC characteristics are computed for pnp polysilicon emitter transistors (PETs) in which a thin insulating layer is incorporated in the emitter structure. Both devices with, and without, a post-polysilicon deposition annealing treatment are modeled. The effects of the annealing are taken to be a reduction in the insulator thickness and the creation of a p-type monosilicon emitter region. The simulations reveal that moderate current gains, around 300, are possible with these devices}, keywords = {bipolar transistors;digital simulation;elemental semiconductors;semiconductor device models;semiconductor technology;silicon;tunnelling;}, URL = {http://dx.doi.org/10.1016/0038-1101(90)90060-R}, author = { Laser, A.P. and Chu, K.M. and Pulfrey, D.L. and Maritan, C.M. and Tarr, N.G.} }