@article { ivanov_catastrop, title = {Catastrophic short and open fault detection in bipolar CML circuits: a case study}, journal = {J. Electron. Test., Theory Appl. (Netherlands)}, volume = {16}, year = {2000}, month = {dec}, pages = {631-4}, type = {article}, abstract = {The detection of catastrophic short and open faults in bipolar current mode logic (CML) circuits is studied. The non-intrusive tests considered include functional (logic) tests, an Idd test, and a common-mode test. A 622 Mbps SONET SIPO (Serial-In/Parallel-Out) and a PISO (Parallel-In/Serial-Out) circuit form the basis of this case study}, keywords = {bipolar logic circuits,current-mode logic,fault location,integrated circuit testing,logic testing}, URL = {http://dx.doi.org/10.1023/A:1008325420970}, author = { Ivanov, A. and Devdas, V.} }