"Design and implementation of reconfigurable and flexible test access mechanism for system-on-chip", Integr. VLSI J. (Netherlands), vol. 40, pp. 149-60, feb.
"Time domain multiplexed TAM: implementation and comparison", Proceedings Design, Automation and Test in Europe Conference and Exhibition, Munich, Germany, IEEE Comput. Soc, pp. 732-7, 2003 .
"Design of an optimal test access architecture using a genetic algorithm", Proceedings 10th Asian Test Symposium, Kyoto, Japan, IEEE, pp. 205-10, 2001 .